Improvements in processing performance of semiconductor apparatuses have been led by miniaturization of pattern sizes in lithography technology on the basis of shifts to shorter wavelengths of light sources. The shift to shorter wavelength, however, became slow since an ArF light source had appeared, and the improvement alternate to the miniaturization has been necessary. Accordingly, development of semiconductor apparatus with a three-dimensional structure, in which transistors are arranged in higher density and the performance of semiconductor apparatuses can be improved thereby, has been proceeding. In a substrate of the semiconductor apparatus having such a three-dimensional structure, the circuit pattern is formed to have a deeper and finer structure compared to that of a previous substrate, whereby a practical process margin cannot be prepared by a lithography technology that is optimized to a planar structure formed in the previous arts. Accordingly, the process margin have to be ensured by forming a flat surface using a material that can flatten a substrate having a three-dimensional structure, and then patterning the flat surface by a lithography technology.
As the technology that can form such a flat surface, many technologies to form flattening films from spin coating type organic films have been already known (Patent Literatures 1 to 5). The organic films formed from such a material, however, cannot be applied to all of the patterns of the substrate for manufacturing a semiconductor apparatus. Additions of liquid additives such as polyether polyol and polyacetal have been also proposed (Patent Literatures 6 and 7). Such an additive, however, generally lacks dry etching resistance. Accordingly, when this remains in a coating film, the coating film can lack dry etching resistance in processing of a substrate, and can lack the dry etching resistance property of an organic film for processing a substrate. The utilized flattening method also include a method in which unevenness on a substrate is filled and then flattened by chemical mechanical polishing (CMP) process (Patent Literature 8), but the CMP is a costly process. In these situations, it has been demanded a method for highly flattening a substrate for manufacturing a semiconductor apparatus by using an organic film at low cost.